# frv testcase for bcnclr $ICCi,$ccond,$hint # mach: all .include "testutils.inc" start .global bcnclr bcnclr: ; ccond is true set_spr_immed 128,lcr set_spr_addr ok1,lr set_icc 0x0 0 bcnclr icc0,0,0 fail ok1: set_spr_addr bad,lr set_icc 0x1 1 bcnclr icc1,0,1 set_spr_addr ok3,lr set_icc 0x2 2 bcnclr icc2,0,2 fail ok3: set_spr_addr bad,lr set_icc 0x3 3 bcnclr icc3,0,3 set_spr_addr ok5,lr set_icc 0x4 0 bcnclr icc0,0,0 fail ok5: set_spr_addr bad,lr set_icc 0x5 1 bcnclr icc1,0,1 set_spr_addr ok7,lr set_icc 0x6 2 bcnclr icc2,0,2 fail ok7: set_spr_addr bad,lr set_icc 0x7 3 bcnclr icc3,0,3 set_spr_addr ok9,lr set_icc 0x8 0 bcnclr icc0,0,0 fail ok9: set_spr_addr bad,lr set_icc 0x9 1 bcnclr icc1,0,1 set_spr_addr okb,lr set_icc 0xa 2 bcnclr icc2,0,2 fail okb: set_spr_addr bad,lr set_icc 0xb 3 bcnclr icc3,0,3 set_spr_addr okd,lr set_icc 0xc 0 bcnclr icc0,0,0 fail okd: set_spr_addr bad,lr set_icc 0xd 1 bcnclr icc1,0,1 set_spr_addr okf,lr set_icc 0xe 2 bcnclr icc2,0,2 fail okf: set_spr_addr bad,lr set_icc 0xf 3 bcnclr icc3,0,3 ; ccond is true set_spr_immed 1,lcr set_spr_addr okh,lr set_icc 0x0 0 bcnclr icc0,1,0 fail okh: set_spr_immed 1,lcr set_spr_addr bad,lr set_icc 0x1 1 bcnclr icc1,1,1 set_spr_immed 1,lcr set_spr_addr okj,lr set_icc 0x2 2 bcnclr icc2,1,2 fail okj: set_spr_immed 1,lcr set_spr_addr bad,lr set_icc 0x3 3 bcnclr icc3,1,3 set_spr_immed 1,lcr set_spr_addr okl,lr set_icc 0x4 0 bcnclr icc0,1,0 fail okl: set_spr_immed 1,lcr set_spr_addr bad,lr set_icc 0x5 1 bcnclr icc1,1,1 set_spr_immed 1,lcr set_spr_addr okn,lr set_icc 0x6 2 bcnclr icc2,1,2 fail okn: set_spr_immed 1,lcr set_spr_addr bad,lr set_icc 0x7 3 bcnclr icc3,1,3 set_spr_immed 1,lcr set_spr_addr okp,lr set_icc 0x8 0 bcnclr icc0,1,0 fail okp: set_spr_immed 1,lcr set_spr_addr bad,lr set_icc 0x9 1 bcnclr icc1,1,1 set_spr_immed 1,lcr set_spr_addr okr,lr set_icc 0xa 2 bcnclr icc2,1,2 fail okr: set_spr_immed 1,lcr set_spr_addr bad,lr set_icc 0xb 3 bcnclr icc3,1,3 set_spr_immed 1,lcr set_spr_addr okt,lr set_icc 0xc 0 bcnclr icc0,1,0 fail okt: set_spr_immed 1,lcr set_spr_addr bad,lr set_icc 0xd 1 bcnclr icc1,1,1 set_spr_immed 1,lcr set_spr_addr okv,lr set_icc 0xe 2 bcnclr icc2,1,2 fail okv: set_spr_immed 1,lcr set_spr_addr bad,lr set_icc 0xf 3 bcnclr icc3,1,3 ; ccond is false set_spr_immed 128,lcr set_spr_addr bad,lr set_icc 0x0 0 bcnclr icc0,1,0 set_icc 0x1 1 bcnclr icc1,1,1 set_icc 0x2 2 bcnclr icc2,1,2 set_icc 0x3 3 bcnclr icc3,1,3 set_icc 0x4 0 bcnclr icc0,1,0 set_icc 0x5 1 bcnclr icc1,1,1 set_icc 0x6 2 bcnclr icc2,1,2 set_icc 0x7 3 bcnclr icc3,1,3 set_icc 0x8 0 bcnclr icc0,1,0 set_icc 0x9 1 bcnclr icc1,1,1 set_icc 0xa 2 bcnclr icc2,1,2 set_icc 0xb 3 bcnclr icc3,1,3 set_icc 0xc 0 bcnclr icc0,1,0 set_icc 0xd 1 bcnclr icc1,1,1 set_icc 0xe 2 bcnclr icc2,1,2 set_icc 0xf 3 bcnclr icc3,1,3 ; ccond is false set_spr_immed 1,lcr set_spr_addr bad,lr set_icc 0x0 0 bcnclr icc0,0,0 set_spr_immed 1,lcr set_icc 0x1 1 bcnclr icc1,0,1 set_spr_immed 1,lcr set_icc 0x2 2 bcnclr icc2,0,2 set_spr_immed 1,lcr set_icc 0x3 3 bcnclr icc3,0,3 set_spr_immed 1,lcr set_icc 0x4 0 bcnclr icc0,0,0 set_spr_immed 1,lcr set_icc 0x5 1 bcnclr icc1,0,1 set_spr_immed 1,lcr set_icc 0x6 2 bcnclr icc2,0,2 set_spr_immed 1,lcr set_icc 0x7 3 bcnclr icc3,0,3 set_spr_immed 1,lcr set_icc 0x8 0 bcnclr icc0,0,0 set_spr_immed 1,lcr set_icc 0x9 1 bcnclr icc1,0,1 set_spr_immed 1,lcr set_icc 0xa 2 bcnclr icc2,0,2 set_spr_immed 1,lcr set_icc 0xb 3 bcnclr icc3,0,3 set_spr_immed 1,lcr set_icc 0xc 0 bcnclr icc0,0,0 set_spr_immed 1,lcr set_icc 0xd 1 bcnclr icc1,0,1 set_spr_immed 1,lcr set_icc 0xe 2 bcnclr icc2,0,2 set_spr_immed 1,lcr set_icc 0xf 3 bcnclr icc3,0,3 pass bad: fail