# frv testcase for nfsubs $FRi,$FRj,$FRk # mach: fr500 fr550 frv .include "testutils.inc" float_constants start load_float_constants .global nfsubs nfsubs: nfsubs fr0,fr16,fr1 test_fr_fr fr1,fr0 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr4,fr16,fr1 test_fr_fr fr1,fr4 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr8,fr16,fr1 test_fr_fr fr1,fr8 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr12,fr16,fr1 test_fr_fr fr1,fr12 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr16,fr16,fr1 test_fr_fr fr1,fr16 test_fr_fr fr1,fr20 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr20,fr16,fr1 test_fr_fr fr1,fr16 test_fr_fr fr1,fr20 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr24,fr16,fr1 test_fr_fr fr1,fr24 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr28,fr16,fr1 test_fr_fr fr1,fr28 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr32,fr16,fr1 test_fr_fr fr1,fr32 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr36,fr16,fr1 test_fr_fr fr1,fr36 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr40,fr16,fr1 test_fr_fr fr1,fr40 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr44,fr16,fr1 test_fr_fr fr1,fr44 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr48,fr16,fr1 test_fr_fr fr1,fr48 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr52,fr16,fr1 test_fr_fr fr1,fr52 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr0,fr20,fr1 test_fr_fr fr1,fr0 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr4,fr20,fr1 test_fr_fr fr1,fr4 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr8,fr20,fr1 test_fr_fr fr1,fr8 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr12,fr20,fr1 test_fr_fr fr1,fr12 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr16,fr20,fr1 test_fr_fr fr1,fr16 test_fr_fr fr1,fr20 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr20,fr20,fr1 test_fr_fr fr1,fr16 test_fr_fr fr1,fr20 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr24,fr20,fr1 test_fr_fr fr1,fr24 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr28,fr20,fr1 test_fr_fr fr1,fr28 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr32,fr20,fr1 test_fr_fr fr1,fr32 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr36,fr20,fr1 test_fr_fr fr1,fr36 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr40,fr20,fr1 test_fr_fr fr1,fr40 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr44,fr20,fr1 test_fr_fr fr1,fr44 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr48,fr20,fr1 test_fr_fr fr1,fr48 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr52,fr20,fr1 test_fr_fr fr1,fr52 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr32,fr36,fr1 test_fr_fr fr1,fr8 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr44,fr40,fr1 test_fr_fr fr1,fr36 test_spr_immed 0,fner1 test_spr_immed 0,fner0 ; try to cause exceptions nfsubs fr4,fr28,fr1 ; test_fr_fr fr1,fr44 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr0,fr28,fr1 ; test_fr_fr fr1,fr44 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr56,fr28,fr1 ; test_fr_fr fr1,fr44 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfsubs fr60,fr28,fr1 ; test_fr_fr fr1,fr44 test_spr_immed 2,fner1 test_spr_immed 0,fner0 pass